| 摘要 |
PURPOSE: To reduce the switching loss by so linearly signal processing the command phase voltages of three phases at each control period as not to exceed the amplitude of a modulation carrier signal, and using the carrier signal as the obtained intermediate phase voltage signals of the three phases. CONSTITUTION: A PWM apparatus 4 has a front stage processor 8 of a controller 5 side and a rear stage processor 9 of an inverter 2 side. The processor 8 executes such as degrades and biases as predetermined linear signal processing the command phase voltage received from the controller 5 at each control period, and outputs intermediate phase voltage signals Vut, Vvt, Vwt to the processor 9. The processor 9 PWM-processes the intermediate phase voltage signal received from the processor 8 by using a carrier signal linearly varying a triangular wave with the amplitude between peaks as DC power source voltage value, generates a pulselike switching signal, and outputs it to the inverter 2. |
