| 摘要 |
PROBLEM TO BE SOLVED: To provide a shift circuit with a small layout area for simultaneously and independently executing the shift and rearrangement of plural data bytes, and a method therefore. SOLUTION: This is a shift circuit 400 whose one side face includes a first register 101, plural first buses 111-118 connected with the first register 101, second register 102, plural second buses 121-128 connected with the second register 102, plural third buses 431-446 which receive full data bytes from the first and second registers 101 and 102, plural byte shift multiplexers 41-56 respectively connected with corresponding one of the third buses 431-446, which have plural output terminals, plural bit shift, multiplexers 1-8 respectively connected with the output terminal of a pair of corresponding byte shift multiplexers 41-56, and control circuit 400 connected with the byte shift multiplexers 41-56 and the bit shift multiplexers 1-8. |
