| 摘要 |
PROBLEM TO BE SOLVED: To reduce a parasitic resistance value and inductance of wire and pin by separating units comprising a plurality of function units with such a region of a semiconductor layer as no function unit is formed. SOLUTION: A semiconductor material layer 5 is selectively coated with an insulated gate layer 11 extending on a first doped region 7, and the gate layer 11 is made to contact gate metal meshes 101 and 102 connected to at least one gate metal pad, while surrounding a source metal plate 100. By connecting the gate metal pad to each pin P8 of a package with each bonding wire W8, all MOSFET units among all the MOSEFT units are connected in parallel. Thus, the maximum current capacity of the power device can be re- established, while each source electrode pin can be electrically speared according to individual purposes, resulting in significantly improved freedom in design. |
