| 摘要 |
PURPOSE: To exclude troublesome manual selection and to prevent mis-selection by allowing a changeover device to select a proper clock generating means in response to a frequency accuracy of an analog video signal. CONSTITUTION: An analog video signal 1 is converted into a digital video signal 3 by an A/D converter 2. When a PLL circuit 6a is unlocked, a discrimination signal with an H level is outputted and when the PLL circuit 6a is locked, the discrimination signal with an L level is outputted conversely. A changeover device 11b receiving an output of the discrimination signal 14 selects the PLL circuit 6a when the discrimination signal 14 is at an L level and selects a PLL circuit 7 when the discrimination signal 14 is at an H level, and provides an output of an output clock 12. Thus, the selection of a PLL circuit is automated and the A/D converter is provided in which a proper output clock 12 is fed automatically to the A/D converter 2. |
