发明名称 |
Intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard CMOS technology |
摘要 |
PCT No. PCT/CH93/00124 Sec. 371 Date Jan. 14, 1994 Sec. 102(e) Date Jan. 14, 1994 PCT Filed May 18, 1993 PCT Pub. No. WO93/23926 PCT Pub. Date Nov. 25, 1993.The present invention relates to an intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard CMOS technology. The output stage (20) is comprised of two transistors, respectively with N channel and P channel, achieved according to a standard CMOS technology. The intermediary circuit is comprised of a voltage level translator (21) coupled between an input logic circuit SL and said output stage (20). The voltage level translator (21) is achieved according to a standard CMOS technology and is comprised of at lest two similar base blocks forming voltage mirrors interconnected in a cross-configuration. Said circuit is used to control transducers, plasma screens and electromechanical actuators.
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申请公布号 |
US5473268(A) |
申请公布日期 |
1995.12.05 |
申请号 |
US19940182143 |
申请日期 |
1994.01.14 |
申请人 |
ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE |
发明人 |
DECLERCQ, MICHEL J.;SCHUBERT, MARTIN F. W. |
分类号 |
H03K19/0185;(IPC1-7):H03K19/094;H03K3/26 |
主分类号 |
H03K19/0185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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