发明名称 PATTERN FORMING METHOD, PATTERN FORMING EQUIPMENT, MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND SEMICONDUCTOR MANUFACTURING EQUIPMENT
摘要 PURPOSE: To improve elimination capability of a side film which is formed on the side wall of a pattern when it is formed by dry etching. CONSTITUTION: A photoresist pattern 24b formed on a laminated conductor film 23 is used as an etching mask, and a semiconductor substrate 10 is subjected to dry etching. After the laminated conductor film 23 exposed from the photoresist pattern 24b is eliminated by etching. In the state that a high frequency bias voltage is applied to the semiconductor substrate 10, plasma dry etching wherein O2 /SF6 or O2 /CHF3 or O2 /CF based gas is used as etching gas is performed, thereby eliminating a side film.
申请公布号 JPH08213366(A) 申请公布日期 1996.08.20
申请号 JP19950019436 申请日期 1995.02.07
申请人 HITACHI LTD;TEXAS INSTR JAPAN LTD 发明人 HARA KAZUSATO;TORII ZENZO;NISHIMURA MICHIO;MATSUI TAKESHI
分类号 G03F7/36;H01L21/302;H01L21/3065;(IPC1-7):H01L21/306 主分类号 G03F7/36
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