发明名称 EQUIPMENT AND METHOD FOR DISTRIBUTED CONTROL IN PROCESSOR ARCHITECTURE
摘要 PROBLEM TO BE SOLVED: To provide a multilevel instruction scheduling system in which the plural execution pipes of a distributed data flow(DDF) processor can be controlled. SOLUTION: This multilevel scheduling system is provided with a simple large-area instruction scheduler 230, and plural local instruction schedulers 241b... corresponding to the number of execution pipes 241-249. The large-area instruction scheduler 230 operates the distribution of instructions to the execution pipes 241-249. Each local instruction scheduler 241b... operates only the scheduling for the partial charge of the distributed instructions, and the matching of the instructions whose number is decreased with the executing units of the corresponding execution pipes when all source operands are usable.
申请公布号 JPH08212070(A) 申请公布日期 1996.08.20
申请号 JP19950318516 申请日期 1995.11.14
申请人 SUN MICROSYST INC 发明人 ROBAATO YANGU
分类号 G06F9/38;G06F15/80;(IPC1-7):G06F9/38 主分类号 G06F9/38
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