| 摘要 |
<p>PURPOSE: To reduce the number of transistors(TRs) in the MOS static flip-flop. CONSTITUTION: In the case of D-flip-flop, CMOS inverters IV1 to IV6 and control switches S1 to S4 are connected as shown in the figure, P-channel MOS TRs are adopted for the switches S1 , S4 and N-channel MOS TRs are adopted for the switches S2 , S3 . The TRs of the switches S1 to S4 are controlled by a clock signalϕ. The TRs for the switches S2 , S3 with a higher threshold voltage are adopted for the N-channel MOSFET NH of the inverter IV2 and the P-channel MOSFET PH of the inverter IV4 . A circuit section including the S2 , IV3 and a circuit section including the S4 and IV5 may be CMOS inverters with a lower drive capability than those of the IV1 , IV2 . This invention is applicable to a T-flip-flop.</p> |
