| 摘要 |
PURPOSE: To obtain a semiconductor memory element in which every memory cell array region is provided a reliability matched to the degree of required reliability. CONSTITUTION: Bit lines 22 in a width of 1.5μm are arranged at an interval of 0.5μm over the whole of a memory cell array 10 constituting a memory LSI. In addition, regarding word lines 20, the word lines 20 indicated by X0 to X3 corresponding to a data storage region 12 whose required reliability is higher than that of a sound data storage region 14 are formed in a width of 2.0μm, and they are arranged at a wide pitch of an interval of 1.5μm. On the other hand, the word lines 20 indicated by X4 and onward corresponding to the sound data storage region 14 as a region whose reliability is not high have a width of 1.5μm, and they are arranged at an interval of 0.5μm.
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