| 摘要 |
FIELD: electronics, integral circuits of memory units. SUBSTANCE: device has delay line which calculates duration of pulses to be generated and which has serial circuit of model of writing line of memory unit and memory gate which identical memory unit. In addition device has first and second D flip-flops, XOR gate, output of generated pulses and input clock signals. EFFECT: possibility of dependence of duration of generated signals on real processes for switching memory gates and for signal distribution in writing circuit of memory unit. 2 dwg |
