Method and apparatus for thermal impedance evaluation of packaged semiconductor components

摘要

The present invention is related to a system for evaluating the thermal impedance of packaged semiconductor chips. The measuring apparatus according to the invention includes a thermostatic bath filled with a dielectric liquid and a temperature sensor for measuring the temperature of said bath. The semiconductor chip is subjected to a calibration step followed by a thermal response measurement step. Increasing the power pulse length allows measurement of the steady-state junction-to-case thermal resistance. The measuring apparatus and method is further used for tracing in-situ degradation of packaged semiconductor chips due to power cycling.