FILTERED SERIAL EVENT CONTROLLED COMMAND PORT FOR FLASH MEMORY

摘要

A filtered command port architecture for a memory array is disclosed. A command controller is directly connected to the memory array and receives command instructions from an external microprocessor via a data bus. A command clock is used to latch commands from the data bus into a command decoder. A timing signal is used tofilter incoming control signals which are asserted for less than a predetermined amount of time. A state decoder then tracks a sequence of commands from the command decoder and performs an appropriate action in response to the commands.