发明名称 Plasma etching method
摘要 <p>A plasma etching apparatus has a lower electrode (24) for supporting a semiconductor wafer (W) in a processing room (14a), an upper electrode (40) opposite to the lower electrode, and an RF power supply (28) for applying an RF power across the upper and lower electrodes. An SiN layer (5) as an underlayer having a shoulder portion (5a), and an SiO2 layer (6) covering the SiN layer are disposed on the wafer. A contact hole (8) is formed in the SiO2 layer by etching so as to expose the shoulder portion of the SiN layer. A processing gas contains C4F8 and CO. To set the etching selection ratio of SiO2/SiN, the discharge duration of each part of the processing gas is used as a parameter. The progress of dissociation of C4F8 is controlled by selecting the discharge duration. The discharge duration is determined by the residence time of each part of the processing gas and the application time of an RF power. &lt;IMAGE&gt; &lt;IMAGE&gt;</p>
申请公布号 EP0726596(A2) 申请公布日期 1996.08.14
申请号 EP19960101751 申请日期 1996.02.07
申请人 TOKYO ELECTRON LIMITED 发明人 INAZAWA, KOICHIRO;OKAMOTO, SHIN;HAYASHI, HISATAKA;MATSUSHITA, TAKAYA
分类号 H05H1/46;C23F4/00;C30B33/12;H01L21/302;H01L21/3065;H01L21/311;(IPC1-7):H01L21/311;H01L21/00 主分类号 H05H1/46
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