发明名称 Dual sided integrated circuit chip package with offset wire bonds and support block cavities
摘要 A method is disclosed for constructing a dual-sided chip package onto a leadframe having a die pad and a set of lead fingers corresponding to the die pad. Integrated circuit dies are disposed onto each side of the die pad while the leadframe is supported with support blocks having cavities that accept the integrated circuit dies and that support each lead finger and that provide clearance for stitch bonds of the previously formed wire bonds. Thereafter, a one step plastic mold is formed around each assembly comprising the dual integrated circuit dies, the die pads, and the wire bonds.
申请公布号 US5545922(A) 申请公布日期 1996.08.13
申请号 US19950404534 申请日期 1995.03.15
申请人 INTEL CORPORATION 发明人 GOLWALKAR, SURESH V.;FOEHRINGER, RICHARD;WENTLING, MICHAEL;TAKATSUKI, RYO;KAWASHIMA, SHIGEO;TSUJIMOTO, KEIICHI;SATO, NOBUAKI
分类号 H01L23/28;H01L21/56;H01L21/60;H01L23/495;H01L23/50;(IPC1-7):H01L23/48 主分类号 H01L23/28
代理机构 代理人
主权项
地址