| 摘要 |
PROBLEM TO BE SOLVED: To provide the manufacturing method of a three-dimensional integrated circuit which improves the yield and reduces the manufacturing cost. SOLUTION: In order to assemble a system containing a plurality of component bas layers, an additive carrier layer containing no components is used. A first component base layer 1 finished with process work is firstly subjected to a function discrimination test, and chips 2 free from defect in the first component base layer are selected. The component base layer 1 is bonded to an auxiliary base layer, thinned from the backside, and divided into individual chips 2. Chips 2 free from defect which are later selected are stuck side by side on the carrier base layer 9. After the auxiliary base layer is eliminated, the chips of a second component base layer are stuck on the chips 2 of the first component base layer 1 by the same method as the first component base layer 1. |
