| 摘要 |
PURPOSE: To improve the data transfer efficiency between a highly integrated memory and a plurality of operation circuits in a semiconductor device having the memory and operation circuits formed in one chip. CONSTITUTION: In addition to a memory cell array 10 for holding data and a plurality of operation circuits 40 for receiving/operating data, a plurality of data transfer circuits 30 having read paths R1-Rp for sending data of a memory cell Cij to the operation circuits and write paths W1-Wp for sending data from the operation circuits to the memory cell are integrated on a semiconductor chip 90. Since the read paths R1-Rp and write paths Wl-Wp are separately provided from each other, reading and writing of data can be conducted simultaneously. Accordingly, image data can be processed at a high velocity. When data in a memory cell on a word line once raised are sequentially processed, the number of raising times for the word line is reduced, so that the consuming power is reduced. |
