发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: To reduce the current consumption when a bit line is charged/ discharged and enlarge the read signal. CONSTITUTION: Each bit line 23 is divided in four. The divided bit lines are connected by three MOS transistors 27 which are controlled by signal lines 28a and 28b to turn the bit line 23 farther from a selected memory cell 21 seen from a sense amplifier 24 into a non-selected state. The capacity of the bit line becomes smaller as the bit line is closer to the sense amplifier 24. This structural unit is arranged so as to alternate the sense amplifiers 24 to a cell array 26. Such a layout is designed that the capacity of a cell is proportional to the capacity of the bit line.
申请公布号 JPH08203267(A) 申请公布日期 1996.08.09
申请号 JP19950012257 申请日期 1995.01.30
申请人 NEC CORP 发明人 SAEKI TAKANORI
分类号 G11C11/417;G11C11/401;G11C11/404;G11C11/4097;(IPC1-7):G11C11/401 主分类号 G11C11/417
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