ORDERED AND RELIABLE SIGNAL DELIVERY IN A DISTRIBUTED MULTIPROCESSOR

摘要

An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group (G1) whose member processes (P100, P110, P120) are distributed across multiple processors (2a, 2b, 2c). The apparatus and method insure that each process group memory process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.