发明名称 Input panel avoiding interference pattern.
摘要 The input panel is of a resistance layer type and includes a first board (1) having a first transparent conductive layer (3) on one surface thereof, a second board (2) having a second transparent conductive layer (4) on one surface thereof, the first board (1) and the second board (2) being arranged such that the first transparent conductive layer (3) faces the second transparent conductive layer (4). First spacers (5) are arranged between the first board (1) and the second board (2). The first spacers (5) are non-conductive and have a height no greater than 14 mu m. Second spacers (6, 6A) are arranged between the first board (1) and the second board (2) among the first spacers (5). The second spacers (6, 6A) are non-conductive and have a height no smaller than 15 mu m. <IMAGE>
申请公布号 EP0672996(A3) 申请公布日期 1996.07.31
申请号 EP19950400591 申请日期 1995.03.17
申请人 FUJITSU LIMITED 发明人 MATSUDA, GENICHI;TANAKA, TOSHIAKI
分类号 G06F3/045;G06F3/033 主分类号 G06F3/045
代理机构 代理人
主权项
地址