发明名称 DS3 FRAME CHANNEL DATA SIGNAL AND PHASE FORMER OF CHANNEL CLUCK
摘要 a decoding means (11) for adjusting the phase between the data and clock; a relay function means (13) for relaying an externally input channel slot signal according to the input clock; a phase selecting means (12) for combining the output signals from the decoding means (11) and the relay function means (13) to generate a selection control signal; and a phase shaping means (14) for receiving the input channel slot and the selection control signal from the phase selecting means (12) to shape the phase and output a channel clock.
申请公布号 KR960010387(B1) 申请公布日期 1996.07.31
申请号 KR19930030010 申请日期 1993.12.27
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 LEE, KANG - HWAN;JUNG, JOO - HONG
分类号 H03K5/00;(IPC1-7):H03K5/00 主分类号 H03K5/00
代理机构 代理人
主权项
地址