发明名称 |
Bipolar flip-flop circuit with improved noise immunity |
摘要 |
A semiconductor integrated bipolar flip-flop circuit prevents or suppresses erroneous operation arising from a current induced by external noise and flowing through a parasitic capacitance associated with a p-type diffused resistor. The semiconductor integrated circuit includes bipolar transistors that are directly involved with set and reset operations of the flip-flop circuit having bases connected to a two-stage inverter including bipolar transistors so that the bases of the bipolar transistors involved in setting and resetting are not connected directly to a p-type diffused resistor.
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申请公布号 |
US5541544(A) |
申请公布日期 |
1996.07.30 |
申请号 |
US19940307464 |
申请日期 |
1994.09.19 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
NAKANO, TOSHIYA |
分类号 |
H03K3/286;H03K3/013;H03K3/287;(IPC1-7):H03K3/286;H03K17/16 |
主分类号 |
H03K3/286 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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