发明名称 Signal processing circuit including a variable gain input stage
摘要 The invention concerns a processing circuit (2, 120) for producing a variable output signal in response to a variable quantity picked up or received as input. The processing circuit is associated with a stage or has an input sensor (4, 100) furnishing a signal with a variable amplification/attenuation factor, and further exhibits response characteristics which depend in particular from state variables. The processing circuit includes a suppression circuit (FIG. 5, FIG. 6) for suppressing transients normally produced by modification of the amplification/attenuation factor, this suppression circuit functioning by modifying the value of the state variables in direct proportion to the modification of the amplification/attenuation factor.
申请公布号 US5541600(A) 申请公布日期 1996.07.30
申请号 US19940264645 申请日期 1994.06.23
申请人 CSEM CENTRE SUISSE D'ELECTRONIQUE ET DE MICROTECHNIQUE SA-RECHERCHE ET DEVELOPPEMENT 发明人 BLUMENKRANTZ, ENRIQUE M.;NYS, OLIVIER
分类号 G01R15/08;G01R19/00;H03G3/00;H03H19/00;H03K7/06;H03M3/02;H03M3/04;(IPC1-7):H03M1/18 主分类号 G01R15/08
代理机构 代理人
主权项
地址