| 摘要 |
The present invention relates to a serial/parallel converter circuit with uncertainty removing function. The object of the invention is to offer that signals can be instantaneously rearranged in the same data arrangement as that of original parallel signals prior to a parallel to serial conversion. The serial/parallel converter circuit is constituted of a serial/parallel converter unit for converting a serial signal once subjected to a parallel to serial conversion into parallel signals; a parallel/serial converter unit for converting the parallel signals converted by the serial/parallel converter unit into a serial signal; a comparing and judging unit for judging whether the serial/parallel converter unit has converted at a predetermined timing operation, by comparing the serial signal from the parallel/serial converter unit with the serial signal inputted to the serial/parallel converter unit; and correcting unit for correcting the parallel signals from the serial/parallel converter unit when the serial/parallel converter unit has not converted at a predetermined timing operation, based on the result from the comparing and judging unit.
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