| 摘要 |
one node of a first cell capacitor, where the source of a transfer transistor is connected to the first bit line, to the drain of the transfer transistor of the first cell, and the other node to a second bit line(/BIT); one node of the second cell capacitor, where the source of the transfer transistor is connected to the second bit line(/BIT), to the drain of the transfer transistor of the second cell, and the other node to the first bit line(BIT).
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