发明名称 Test method for a semiconductor integrated circuit having a multi-cycle path and a semiconductor integrated circuit
摘要 The test method for a semiconductor integrated circuit includes a multi-cycle test step and a single-cycle test step. In the multi-cycle test step, a data-read side flipflop holds data according to a clock enable signal to test a multi-cycle path. In the single-cycle test step, no data is captured for the multi-cycle path.
申请公布号 US2005172189(A1) 申请公布日期 2005.08.04
申请号 US20040024463 申请日期 2004.12.30
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 ICHIKAWA OSAMU
分类号 G01R31/28;G01R31/3185;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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