发明名称 |
Delay detection circuit and low-noise oscillation circuit using the same |
摘要 |
The circuit includes a first high frequency mixer which multiplies an oscillation output by a delayed output. The oscillation output is delayed by a predetermined time to generate a first high frequency signal. A second high frequency mixer multiplies the delayed oscillation output by a phase-shifted (24) oscillation output, obtained by a pi/2 radian delay, to generate a second high frequency signal. A first low frequency mixer multiplies the DC and phase-noise components in the first high frequency signal by the phase-noise components in the second high frequency signal to generate a first low frequency signal. A second low frequency mixer multiplies the DC and phase-noise components in the second high frequency signal by the phase-noise components in the first high frequency signal to generate a second low frequency signal. An adder-subtracter responds to the second low frequency signal by removing dependence on the predetermined delay time from primary phase-noise components in the first low frequency signal. A control voltage is generated without dependence. |
申请公布号 |
EP0723340(A1) |
申请公布日期 |
1996.07.24 |
申请号 |
EP19960300272 |
申请日期 |
1996.01.15 |
申请人 |
JAPAN RADIO CO., LTD |
发明人 |
YAMASHITA, KAZUO;ADACHI, NOBUYUKI |
分类号 |
H03L1/00;H03B1/04;H03L7/00;H03L7/02;H03L7/099;H03L7/113 |
主分类号 |
H03L1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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