发明名称
摘要 PURPOSE:To provide a light receiving circuit capable of improving a response speed while maintaining stability. CONSTITUTION:The level of a signal outputted from an APD 11 and amplified by a preamplifier 12 and an AGC circuit 13 is detected by a peak value detecting circuit 14 and supplied to an APD bias control circuit 16 through a phase compensating circuit 15 to control the magnification increment of the APD 11. The circuit 15 is constituted so as to compensate a phase at prescribed frequency. A circuit connecting a capacitor in parallel with an input resistor of an inverted amplifier circuit using an operational amplifier can be used as the circuit 15. Consequently the phase margin at the frequency can be increased.
申请公布号 JP2518522(B2) 申请公布日期 1996.07.24
申请号 JP19930170226 申请日期 1993.07.09
申请人 NIPPON ELECTRIC CO 发明人 YANAGISAWA HIROKI
分类号 H04B10/293;H04B10/07;H04B10/40;H04B10/50;H04B10/564;H04B10/572;H04B10/60;H04B10/67;H04B10/69 主分类号 H04B10/293
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