发明名称 Flash memory testing apparatus
摘要 A flash memory testing apparatus is capable of testing a flash memory while maintaining the conventional memory test functions. The flash memory testing apparatus obtains the number of programming pulses applied to each address of the flash memory. The flash memory testing apparatus executes the following steps: comparing a readout data of the flash memory under test under a writing or erasing test with an expected data output from a test pattern generator, outputting a failure signal to a failure analysis memory to store the failure data in a memory part in the failure memory in case where readout data does not coincide with an expected data, and outputting a pass signal when the readout data coincides with the expected data. The flash memory testing system has a counter for counting the number of programming pulses or erasing pulses and supplying the count data to the memory part of the failure analysis memory.
申请公布号 US5539699(A) 申请公布日期 1996.07.23
申请号 US19940304583 申请日期 1994.09.12
申请人 ADVANTEST CORPORATION 发明人 SATO, SHINYA;OHSHIMA, HIROMI
分类号 G01R31/28;G01R31/3193;G11C17/00;G11C29/00;G11C29/44;G11C29/56;(IPC1-7):G11C29/00 主分类号 G01R31/28
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