摘要 |
A frequency synthesizer is able not only to keep a high frequency stability and follow a frequency of a reference signal that is set to cover or varies over a broad range, but also to provide stable phase-locked loop characteristics without a variable frequency oscillator being employed. In the frequency synthesizer, a phase-locked loop comprises phase comparator 1 for detecting a phase difference between reference signal A and comparison signal B to output phase error information; loop filter 2 for generating loop control information D in accordance with the phase error information C; and DDS 22 which generates the comparison signal B in accordance with the loop control information D which is a phase incremental value to take a required frequency out of waveform data corresponding to a phase by employing a clock signal from clock oscillator 32. Thus, synchronizing signal I which follows reference signal A, a frequency of which is set to cover or varies over a broad range can be obtained.
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