| 摘要 |
<p>PURPOSE: To provide a multiplex timer for frame multiplex protocol processing which facilitates the control processing of a multiplex timer and can perform the fast timer control. CONSTITUTION: This multiplex timer includes a timer memory 6 which holds the count value of plural timers and the set display information showing whether the count value of these timers are written or not, a counter 7 which performs the count processing of timers in a time division and multiplex way based on the count value held in the memory 6, a means 10 which detects a time-out state in a count processing mode, a timer control register 11 where the control information on plural timers are written, and a control means which controls the operations of the memory 6, the counter 7, the means 10 and the register 11. In such a constitution, the count value and the set display information are successively written in the memory 6 based on the control information written in the register 11 and also read out and successively sent to the counter 7.</p> |
