发明名称 CPU MODE RECOGNIZING DEVICE AND DIGITAL PROCESSOR
摘要 <p>PURPOSE: To enable a CPU mode recognizing device and a digital processor to accurately recognize a CPU stop mode in an external file, etc. CONSTITUTION: The CPU mode recognizing device of the digital processor is provided with a clock signal supply circuit 6 which stops supply of a clock signal to a digital device 4 when a CPU 2 is set in the CPU stop mode. Further, the device is provided with a detecting circuit 8 which is connected to a clock signal supply circuit 6 for the CPU 2 and detects the clock signal supplied from the clock signal supply circuit 6 and a stop mode recognizing circuit 10 which is connected to the output of the detecting circuit 8 and outputs a CPU stop mode recognition signal unless the detecting circuit 8 outputs a detection signal within a previously set time.</p>
申请公布号 JPH08190441(A) 申请公布日期 1996.07.23
申请号 JP19950003341 申请日期 1995.01.12
申请人 FUJITSU LTD 发明人 KANBARA TOMOKO
分类号 G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/04
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