发明名称 Programmable logic circuit w/neuron MOS transistors
摘要 A semiconductor integrated circuit adaptable to any logic circuits using a common mask with the exception of a mask of metallic wirings so as to drastically improve performance of custom LSIs. The semiconductor integrated circuit comprises a logic circuit having a plurality of input terminals and at least one output terminal. The logic circuit includes a plurality of circuit blocks of the same circuit construction. Each of the circuit blocks has at least two stages of inverter formed by MOS semiconductor devices and at least one layer of a wiring pattern having a different pattern. The output signal of each block is defined by a predetermined function of an input signal.
申请公布号 US5539329(A) 申请公布日期 1996.07.23
申请号 US19950387844 申请日期 1995.02.21
申请人 SHIBATA, TADASHI;OHMI, TADHIRO 发明人 SHIBATA, TADASHI;OHMI, TADHIRO
分类号 H01L21/82;H01L21/822;H01L27/04;H01L27/10;H01L27/118;H03K19/173;(IPC1-7):H03K19/173 主分类号 H01L21/82
代理机构 代理人
主权项
地址