| 摘要 |
FIELD: computer engineering. SUBSTANCE: device has three registers, two multiplexers, two sign inverting units, four adders, D-flip-flop. Output of first adder serves as device output. Second flip-flop and OR gate are introduced to accomplish the goal of invention. For example, if overflow occurs in output adder in result of arithmetic operations, then registers for delay of filtration result are cleared and output of second D-flip-flop is used as flag that confirms distortion in filtration. This also helps in decision making in computing systems which use this device. EFFECT: increased functional capabilities. 4 dwg |
