PHASE LOCKED LOOP SYSTEM EMBEDDED AUTO FREQUENCY TUNING

摘要

a 15-bit shift register(2) serially receives frequency information(DI) from a microcomputer, an adder(10) for operating data latched by a first latch(3) and data of a tuning offset register(9) according to a control signal(CB); a 15-bit programmable divider(5) for presetting data of a second latch(4) whenever its output becomes 0 according to a prescaler(1) to which HF input signal is inputted; a phase detector(6) for receiving a reference frequency and output waveform of the 15-bit programmable divider(5) to generate an output waveform corresponding to the frequency and phase difference; and a tuning offset register(9) for tuning-offsetting N-bit data.