发明名称 Sense amplifier circuit for data read=out from memory
摘要 The data are read-out from a selected memory cell (31) coupled to a selected bit line (33). The circuit comprises a capacitor (12), whose one end is coupled to earth and whose capacity is larger than that of a parasitic capacitor (32) of the selected bit line. A current supply portion (34) feeds simultaneously a current to the selected bit line and to the other end of the first capacitor for increasing the potentials of the selected bit line and the other end of this capacitor. A differential amplifier (2-5) determines the data read-out from the memory cell by comparison of the increased potentials and by setting the bit line voltage to a level, at which no current flows.
申请公布号 DE19600288(A1) 申请公布日期 1996.07.18
申请号 DE19961000288 申请日期 1996.01.05
申请人 MITSUBISHI ELECTRIC SEMICONDUCTOR SOFTWARE CORP., ITAMI, HYOGO, JP;MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 ASAMI, KAZUO, ITAMI, HYOGO, JP
分类号 G11C11/409;G11C7/06;G11C16/06;G11C16/28;G11C17/00;(IPC1-7):G11C7/06 主分类号 G11C11/409
代理机构 代理人
主权项
地址