| 摘要 |
Each of a plurality of buffer memories provided corresponding to a plurality of OUT line fetches a cell through a corresponding address filter and provides the fetched cell to the corresponding OUT line, in normal operation. When any of the buffer memories become full, a spare buffer memory operates in place of the buffer memory, fetches the cell through a corresponding variable buffer memory, and provides the fetched cell to the corresponding OUT line. Such control is effected by a control circuit. Accordingly, in an ATM switch, increase of hardware related to the storage of information and lowering of efficiency in use can be suppressed as much as possible, and the ratio of disposal of the cells can be reduced.
|
