发明名称 CIRCUIT AND METHOD FOR TIMING EXTRACTION
摘要 PURPOSE: To perform phase control for sampling time with high accuracy by providing an edge detection circuit which detects the edge of a reception signal and implementing phase evaluation based on the loading edge of an isolated pulse signal. CONSTITUTION: An equivalent circuit 11 performs the waveform equalization of the reception signal, and it is outputted as sampling data by applying A/D conversion by an A/D conversion circuit 12. The data is received by an isolated pulse detection circuit 16, and an isolated pulse is detected, and an isolated pulse detection signal is outputted. The edge detection circuit 15, when receiving the detection signal from the circuit 16, regards a waveform part of the reception signal at a sampling point of time before several samples as a waveform edge, and outputs the sampling data as an edge level signal. A control circuit 14 receives the signal, and compares the edge level of the signal with a threshold value, and outputs a timing control signal representing whether a timing phase should be led or lagged to a timing generation circuit 13.
申请公布号 JPH08186563(A) 申请公布日期 1996.07.16
申请号 JP19940337081 申请日期 1994.12.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIRASAKI YOSHIMASA
分类号 H04L7/033;H04L7/02 主分类号 H04L7/033
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