发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE: To increase the speed of access in a NAND type mask ROM by precharging the word line of the next address based on the result of judgement about the difference between the address data of consecutive timing. CONSTITUTION: External address data is alternately taken into two systems of address registers of an address buffer 2 by clocks CKA, CKB and sorted to be sent to a column decoder 4 and a row decoder 3 respectively where data is successively read. When the next address judging circuit 10 judges that the present address data AD is different from the next address data NAD, it sends a precharge enable signal to the column and row decoders for precharge 11, 14 to select and precharge only the bit line and word line of the next address. Thus, the precharge of unnecessary lines is eliminated to reduce power consumption and to enable fast access.</p>
申请公布号 JPH08180695(A) 申请公布日期 1996.07.12
申请号 JP19940338268 申请日期 1994.12.27
申请人 YAMAHA CORP 发明人 TANAKA TAISHIN
分类号 G11C17/00;G11C11/41;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
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