发明名称 ERROR ARITHMETIC CIRCUIT
摘要 PURPOSE: To provide a circuit in which the arithmetic process in horizontal error diffusion processing is improved in error diffusion processing to allow the data processing at high frequency. CONSTITUTION: In a circuit for adding a horizontal reproduced error to an input video signal by a horizontal adding circuit 32 to provide a diffused output signal, converting the diffused output signal into a signal having a bit smaller than the input bit, and outputting it to a display panel, an overflow/underflow detecting circuit 44 is connected in parallel to the horizontal adding circuit 32, so that overflow/underflow can be directly judged in an overflow/underflow processing circuit 43 from the input data and the error data.
申请公布号 JPH08179720(A) 申请公布日期 1996.07.12
申请号 JP19940336261 申请日期 1994.12.22
申请人 FUJITSU GENERAL LTD 发明人 KOBAYASHI MASAYUKI;NAKAJIMA MASAMICHI;KOSAKAI ASAO;ONODERA JUNICHI;DENDA ISATO
分类号 G09G3/36;G09G3/20;G09G3/28;G09G3/288;G09G3/296 主分类号 G09G3/36
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