TECHNIQUE FOR HIGH-SPEED PROPAGATION IN CMOS INTEGRATED CIRCUIT

摘要

PURPOSE: To attain a high speed for an information carrying edge of a propagated signal by making the dimension of transistors(TRs) of a CMOS circuit asymmetrical so as to sacrifice of slowing-down of an opposite edge. CONSTITUTION: One input signal and its inverted signal are given respectively to two pulse generators 800, 802. The outputs pass through several stages of asymmetrical logic circuits 804, 806 respectively. An output of a 'true' path 804 drives a gate of a PMOS pullup TR 808 via an inverter and an output of the opposite phase path 806 directly drives an NMOS TR 810. Both drains of the TRs 808, 810 are coupled to obtain one output line. The advantage of the speed of the asymmetrical logic circuit technology is realized by two-way directions of an input signal regardless of a signal output line.