SYNCHARONOUS CLOSK SIGNAL GENERATION CIRCUIT

摘要

PURPOSE: To enhance the clock extracting precision in vertical synchronous period in case of a NTSC non-standard input television signal to stabilize the operation of a synchronous clock signal generating circuit by providing a clock interpolation part and clock generating part having specified functions, respectively, on the circuit. CONSTITUTION: This synchronous clock signal generating circuit has a clock interpolation part HSYN for interpolating the intermittent part of a first clock signal HSYN which is an intermittent pulse having a prescribed period by an interpolation pulse signal PHSYN having the same period to form a second clock signal CHSYN. Further, it has a clock generating part CLKG for forming a third clock signal substantially phase-synchronized with the first clock signal HSYN on the basis of the second clock signal CHSYN.