CLOCK NOISE FILTER FOR INTEGRATED CIRCUITS

摘要

A method and apparatus for providing a clock noise filter are described. The clock noise filter uses a transparent latch (10) which has a trigger input and a data input. The data input is coupled to receive an input clock signal (CLOCK) to be filtered. The output of the latch is the filtered clock signal (FCLOCK). The filtered clock signal has a logic state which corresponds to a logic state of the input clock signal when a trigger input has a first logic state, and the filtered clock signal is inhibited from changing logic state when the trigger input has a second logic state.