| 摘要 |
<p>The invention relates to a circuit for frequency synthesis, comprising: a digital controlled oscillator, comprising (a) a clock generator; an accumulator circuit to which the signal from the clock generator is fed; and a control digit feed circuit for feeding to the digital oscillator a signal representing a control digit; and (b) a phase-locked loop which is connected to the carry output terminal of the accumulator circuit and which is provided with a phase detector, a low-pass filter and a controlled oscillator, wherein the carry output terminal is connected to the phase detector. The digital controlled oscillator is preferably adapted to generate a signal representing a remainder, wherein a correction circuit is arranged for deriving a correction signal from the remainder. The correction circuit is connected to a combination circuit connected to one of the inputs of the phase detector or to a combination circuit incorporated in the phase-locked loop. The circuits can also be connected in cascade.</p> |
