| 摘要 |
A dual-modulus prescaler operating in a high frequency is provided to reduce power consumption of a circuit by making one active branch less than a standard D-type flip flop. A prescaler circuit(1) includes one or more assemblies. An assembly is comprised of a first dynamic D-type flip flop(12), a second dynamic D-type flip flop, and two logic gates(15,16). Two logic gates are arranged in a negative feedback between two dynamic D-type flip flops. Two dynamic D-type flip flops receive a clock for supplying a divided output signal through a second dynamic D-type flip flop as an input clock signal. The frequency of the second dynamic D-type flip-flop is a function of a divided mode selection signal applied to one input among logic gates. One output of the second dynamic D-type flip flop is connected to one input of the first dynamic D-type flip flop. One of the dynamic D-type flip flops is comprised of three active branch to provide one inverted output signal.
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