发明名称 Non-volatile semiconductor memory device and method for erasure and production thereof
摘要 A non-volatile memory cell disclosed herein includes a pair of regions are provided in a channel region in contact respectively with source and drain to provide a symmetrical structure. A data erase is done by applying a high voltage to the source to produce avalanche breakdown between the source and the region to inject induced hot carriers into the floating gate and wherein the memory cell threshold voltage after erasure is converged to a constant value irrespective of the initial states, while the converged value may be controlled to a desired voltage by applying a suitable voltage to the control gate. Erasure sequence consisting in all bit erase and one verification is sufficient such that the erase sequence is simplified and erase time shortened.
申请公布号 US5535158(A) 申请公布日期 1996.07.09
申请号 US19940350978 申请日期 1994.11.29
申请人 NEC CORPORATION 发明人 YAMAGATA, YASUSHI
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/12;G11C16/14;H01L21/8247;H01L27/092;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C7/00 主分类号 G11C17/00
代理机构 代理人
主权项
地址