| 摘要 |
A pointer processing circuit processes SONET/SDH frames and calculates a new pointer value. A pointer interpreter circuit (PI) is constructed to receive an incoming frame, identify the pointer in transport overhead bytes of the frame, interpret the pointer, and send the pointer value directly to a pointer generator circuit (PG). The pointer value indicates the position of the first byte of the data payload bytes of the incoming frame starting at the trace byte J1. The PI is constructed to tag the next data byte after the pointer H1 H2 and negative justification data holding byte location H3 and send the tagged data byte directly to a FIFO without the delay of counting down to the trace byte J1 of the incoming frame. A first in first out memory FIFO is coupled to the PI for writing data payload bytes from the incoming frame into the FIFO. A pointer generator circuit (PG) is coupled to the FIFO for changing the pointer on the outgoing frame. The PG is constructed to determine the position of the tagged data byte relative to the outgoing frame and receive the value of the pointer for the previous incoming frame directly from the PI. The pointer generator is also constructed to calculate a new pointer value for the outgoing frame based upon the position of the tagged data byte relative to the outgoing frame and the pointer value for the previous incoming frame.
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