| 摘要 |
The disclosed data processor (10) has a future file (60) for providing the most recent value of a set of architectural registers (32, 36) to the various execution units (20, 22, 24, 26, 28, 30) of the data processor. The most recent value of the set of architectural registers is determined with respect to the original instruction sequence. The future file provides a single source for operand look-up at instruction dispatch and can be corrected in a single cycle in the event of an exception condition. |
