发明名称
摘要 PURPOSE:To improve a yield by forming the layout of a plate electrode in such a shape that it does not exist between adjacent bit line contact regions. CONSTITUTION:In a DAC(Diagonal Array Cell), a plate electrode layout 16 is formed in a shape in which a plate electrode does not exist between bit line contacts 15 and 15, i.e., in the layout 16 in which its oblique direction is punched. Accordingly, residual etching of the electrode 16 generated between the contacts 15 and 15 can be eliminated. Thus, the contact of the residue with the contact 15 can be avoided to improve its yield.
申请公布号 JP2512598(B2) 申请公布日期 1996.07.03
申请号 JP19900129706 申请日期 1990.05.18
申请人 SHARP KK 发明人 YUTSUGI TATSUYUKI
分类号 H01L27/10;H01L21/8242;H01L27/108 主分类号 H01L27/10
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