| 摘要 |
PURPOSE: To integrate an isolated gate MOSFET transistor and a both side junction gate FET transistor, connected is series, on one chip while keeping the compatibility with a 5 V logic element. CONSTITUTION: A drain region 26 for forming the channel of a junction gate FET transistor (JFET) extends laterally in the opposite directions from a drain contact 16 and the block of a second insular region to a position touching the surface of a substrate 11. It is isolated from a region for forming the channel of an MOSFET disposed laterally between a source contact 14 beneath an insulation layer 18 and the block of first insular region and a position of the extended drain region 26 closest to the surface of the substrate 11. It is combined with a gate electrode 17 for controlling the current passing through an MOSFET channel and flowing beneath the insulation layer 18 by the field effect. With such structure, transistors can be integrated easily on one chip while keeping the compatibility with a 5 V logic element. |
