发明名称 Feedback clamp circuit for analog-to-digital conversion
摘要 An image processing apparatus includes an analog image signal clamp and an A/D converter that converts the analog image signal into an m bit digital signal. The clamp is controlled in accordance with an n+1 (m>n) bit digital image signal converted by the A/D converter and an n bit digital image signal portion of the m bit digital image signal is processed.
申请公布号 US5532758(A) 申请公布日期 1996.07.02
申请号 US19930165865 申请日期 1993.12.14
申请人 CANON KABUSHIKI KAISHA 发明人 HONMA, YOSHIHIRO
分类号 H04N5/14;H03K3/00;H03M1/12;H04N5/16;H04N5/18;H04N7/26;H04N9/79;H04N11/04;(IPC1-7):H04N5/18 主分类号 H04N5/14
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